1. Field of the Invention
The present invention relates to semiconductor memory devices, and more particularly to a semiconductor memory device having a normal mode and a power down mode.
2. Description of the Background Art
In a semiconductor memory device referred to as a DRAM (Dynamic Random Access Memory), a refresh operation is carried out to maintain the data stored in a memory cell. This refresh operation is carried out on the basis of a word line. Upon application of a pulse to a selected word line, a read out of small signals.cndot.amplify.cndot.and rewrite operation are carried out for all the memory cells on the selected word line, whereby all the memory cells on the word line are refreshed at the same time. By sequentially selecting a word line in such a manner, all the memory cells will be refreshed. The method of executing a refresh operation includes the method of carrying out a refresh operation of one cycle (one word line) for every predetermined interval, and the method of refreshing all the memory cells at a burst at an elapse of a predetermined time.
During the execution of such a refresh operation, not only circuitry required for the refresh operation, but also circuitry irrelevant to the refresh operation operates. Therefore, leakage current is generated in association with activation of the transistors included in the circuitry that is not required for the refresh operation. This leakage current becomes so great as to reduce the threshold value of the transistor. Although the threshold value must be lowered in accordance with microminiaturization of the transistor, the entire current consumption of circuitry that uses such a transistor will increase.